The present invention relates to a solid state imaging device having improved light receiving efficiency and a method for manufacturing such a solid state imaging device.
FIG. 10 is a schematic diagram illustrating a prior art frame transfer type solid state imaging device 1. The solid state imaging device 1 includes an imaging section 1i, a storage section 1s, a horizontal transfer section 1h, and an output section 1d. The imaging section 1i is configured by a plurality of vertical shift registers at predetermined intervals. Each bit of the vertical shift registers configures a light receiving pixel. The storage section 1s is configured by a plurality of vertical shift registers extending from the vertical shift registers of the imaging section 1i. The horizontal transfer section 1h is configured by a horizontal shift register, which is arranged at the output side of the storage section 1s. Each bit of the horizontal shift register is associated with one of the vertical shift registers. The output section 1d includes a capacitor, which receives information charges output from the horizontal transfer section 1h. 
In such a prior art configuration, the information charges that are produced by the light receiving pixels in the imaging section 1i are stored in the light receiving pixels for a predetermined time and then transferred to the storage section 1s at a high speed in response to a frame transfer clock Øf. The information charges are temporarily stored in the storage section 1s and then sequentially transferred to the horizontal transfer section 1h in units of single lines in response to a vertical transfer clock Øv. The information charges transferred to the horizontal transfer section 1h are sequentially transferred to the output section 1d in units of single pixels in response to a horizontal transfer clock Øh and successively converted to a voltage value to be output as an image signal Y(t).
Referring to FIG. 12, a p-type diffusion layer 3, which functions as a device area, is formed on the planar surface of an n-type silicon substrate 2. A plurality of equally spaced parallel channel separating regions 4, in which p-type impurities having a high concentration are implanted, are arranged on the surface of the p-type diffusion layer 3. A plurality of n-type diffusion layers are formed between the channel separating regions 4 to define channels 5, which function as transfer routes for the information charges. A plurality of parallel polycrystalline transfer electrodes 7, which extend in a direction intersecting the channels 5, are arranged above the channels 5 with a thin gate insulation film 6, which is made of silicon oxide, arranged in between. As shown in FIG. 11, the three phases of frame transfer clocks Øf1, Øf2, and Øf3 are applied to the transfer electrodes 7. The clock pulses control the potential state at the channels 5.
An interlayer insulation film 9, which is made of the same material as the gate insulation film 6, is formed on the transfer electrodes 7. A plurality of power supply lines 8, which are made of, for example, aluminum, are arranged in the interlayer insulation film 9 in a manner covering the channel separating regions 4. The power supply lines 8 are connected to the transfer electrodes 7 via contact holes 11, which are formed in the interlayer insulation film 9 at predetermined intervals. For example, when performing three-phase driving, a contact hole 11 is provided for every third transfer electrode 7, and a power supply line 8 is provided for every third transfer electrode 7. The interlayer insulation film 9 covers the power supply lines 8. Further, a silicon nitride surface protection film 10 is applied to the interlayer insulation film 9.
In the above solid state imaging device, the power supply lines 8 are formed in a manner covering the channel separating regions 4 in a light receiving area. The aluminum material forming the power supply lines 8 generally has a characteristic that reflects light. Thus, in the light that enters the light receiving area in a uniform manner, the light received by the power supply lines 8 is reflected by the surface of the power supply line 8. Accordingly, the power supply lines 8 stops light from being guided to the channels 5. This results in a deficiency in that such light is not retrieved as information charges.